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Paper details
Number 1 - March 2007
Volume 17 - 2007
FSM encoding for BDD representations
Wilsin Gosti, Tiziano Villa, Alex Saldanha, Alberto L. Sangiovanni-Vincentelli
Abstract
We address the problem of encoding the state variables of a finite state machine such that the BDD representing the next state function and the output function has the minimum number of nodes. We present an exact algorithm to solve this problem when only the present state variables are encoded. We provide results on MCNC benchmark circuits.
Keywords
binary decision diagram, encoding, finite state machine, logic synthesis, formal verification, logic representation